The present invention relates generally to apparatus for extracting a target signal from a composite signal having the target signal and other signals combined together, and more particularly to a signal extracting apparatus which does not need to have an external power supply and which keeps the composite signal as intact as possible.
In electronic circuit applications, multiple signals are sometimes combined into a single composite signal to save cost of equipment (such as coaxial cables) in a signal transmission procedure. The need then arises to separate a target signal from the composite signal in order to further process the target signal, and a signal extracting apparatus must be used. For example, in a display monitor control circuit with only one cable input that represents both the horizontal synchronization (H-sync) and vertical synchronization (V-sync) signals, a signal extracting apparatus is necessary to separate the two signals for operation of the control circuit.
FIG. 1 shows a prior art circuit for extracting a target signal from a composite signal. Signal 111 is a composite signal ((H+V)-sync) of a horizontal synchronization signal (H-sync) and a vertical synchronization signal (V-sync) of a display monitor. Referring to the timing diagram of FIG. 2, signal 211 and signal 212 are the original H-sync and V-sync signals, respectively. Exclusive-OR gate G1 has signal 111 as one input and the other input kept "0". Thus the output signal 112 basically follows signal 111 except that signal 112 has the voltage level of TTL logic and possesses stronger driving capability. Furthermore, G1 separates signal 111 from the resistors and capacitor on the right hand side of the circuit with a high input impedance so that it won't be distorted by the charging and discharging effect.
A low-pass filter consisting of resistors R11 and R12 and capacitor C11 then passes only the low frequency portion of signal 112 and results in signal 113 which is the envelope of the low-frequency signal in the composite signal 111. Signal 113 has the shape of the vertical synchronization signal 212. With resistive and capacitive load of R11, R12, and C11, the rise time and fall time of signal 113 are longer and the amplitude is smaller than signal 112. Therefore another Exclusive-OR gate G2 is inserted between signal 113 and the ultimate output of this signal extracting circuit to recover signal 212 from the distorted signal 113. The other input terminal of G2 is kept "0" as in the case of G1. This makes the output signal 114 have TTL logic voltage levels and rise time and fall time closer to those of signal 212. Gates G1 and G2 can be replaced by OR gates, but whatever logic gates are used, the circuit requires a separate 5-volt power supply.